1. Field of the Invention
The present invention relates generally to programming field programmable gate array (FPGA) devices and, more particularly, to the ability of programming FPGA devices through application specific integrated circuit (ASIC) devices.
2. Description of the Related Art
Often times during the production of electronic systems, design errors may be uncovered or specifications and/or requirements changed. To allow for easy changes when any one of the above occurs, hardware designers have been modeling these systems using FPGA devices. FPGA devices are programmable devices. Hence, they can be reprogrammed as often as needed to adjust to any new specifications or requirements as well as to correct any design errors.
FIG. 1 depicts an electronic system modeled with FPGA devices. Each FPGA device may be modeling a different part of the electronic system. For example, device 100 may be modeling a processor, device 110 may be modeling a memory controller, device 120 a cache controller etc. The devices are interconnected in a daisy chain fashion using an in-system-programming (ISP) bus 160 whereby a programming apparatus can be used to program more than one device. Each device has a serial data in (SDI) pin and a serial data out (SDO) pin. The SDI pin of device 100 is connected to the connector of the programming apparatus (not shown) and its SDO pin is connected to the SDI pin of device 110. The SDO pin of device 110 is connected to the SDI pin of device 120 and the SDO pin of device 120 is connected to the SDI pin of device 130 and so on. The SDO pin of the last device (i.e., device 150) is connected to the connector of the programming apparatus. In this manner, the programming apparatus, using an appropriate protocol, can program any one of the FPGA devices.
During the production of the electronic system, some of the FPGA devices may be replaced by ASIC devices. Whether or not an FPGA device is actually replaced by an ASIC device is usually governed by cost and availability of resources. For example, an FPGA device on the average costs approximately twelve (12) dollars to manufacture whereas the price of an ASIC device is around three (3) dollars. However, depending on the complexity of an ASIC device, the design of the ASIC device may take several thousands dollars in man-hours. Thus, the design cost of an ASIC design must be taken into consideration when making a decision to replace an FPGA device with an ASIC device.
In any event, ASIC devices are application specific devices and, thus, are not programmable. Consequently, ASIC devices are not equipped with programming interfaces nor do they contain SDI and SDO pins. Although devoid of programming interfaces, however, ASIC devices must be able to relay programming information to the FPGA devices located downstream in the chain. Otherwise, the programming chain is broken isolating the downstream FPGA devices from programming accessibility.
The conventional method of relaying programming information to downstream FPGA devices has been to bypass the ASIC devices. FIG. 2 depicts an electronic system modeled with both FPGA and ASIC devices. In FIG. 2, FPGA devices 110 and 150 of FIG. 1 are replaced by ASIC devices 170 and 180, respectively. Resistor R.sub.1 connects the SDO pin of FPGA device 100 to the SDI pin of FPGA device 120. Thus, programming information, in essence, bypasses ASIC device 170 to reach FPGA device 130. Resistor R.sub.2 functions in a similar fashion.
In order to be able to add these resistors to the circuit board, the board onto which the devices are mounted must have been designed with resistor pads at proper locations. That is, all the FPGA devices that would later be replaced by ASIC devices must have been pre-identified, a task that may not be feasible. In the alternative, resistor pads must be added at all locations where devices will be attached to the board. As a result, the board may become quite crowded.
When resistors are used to bypass the ASIC devices, the resistor pads must be populated with resistors for ASIC devices and left empty for FPGA devices. This adds complexity to the manufacturing process of the electronic systems, especially, when multiple FPGA devices are to be replaced by ASIC devices at different times. It also makes it very difficult to use ASIC and FPGA devices interchangeably as second sources to each other or as backup supplies as resistor pads will have to be populated or left empty depending on which of the two devices is used. When multiple FPGA devices are replaced with ASIC devices, the large number of permutations on the bill of materials (i.e., the list of parts that will be used) becomes hard to manage at manufacture time.
Consequently, there is a need in the art for an apparatus and method that allow downstream FPGA devices to be programmed through upstream ASIC devices without using resistors to bypass the ASIC devices.